1. Field of the Invention
The present invention generally relates to the testing of integrated circuits (chips). More specifically, the present invention is directed to an on-chip probing apparatus.
2. Related Art
To assess the interconnection of a high performance package and system, there is a need to probe at the chip-pad interface while the device is in operation. One existing solution connects the probe point to the tester using a simple trace. Unfortunately, the trace itself produces an unwanted stub effect into the probe and signal under test. Further, multiple test points become expensive in view of package real estate and pin count.
Accordingly, there is a need for an on-chip probing apparatus that obviates the deficiencies of the prior art.